1 ha-2520, ha-2522, ha-2525 20mhz, high slew rate, uncompensated, high input impedance, operational ampli?rs ha-2520/2522/2525 comprise a series of operational amplifiers delivering an unsurpassed combination of specifications for slew rate, bandwidth and settling time. these dielectrically isolated amplifiers are controlled at close loop gains greater than 3 without external compensation. in addition, these high performance components also provide low offset current and high input impedance. 120v/ s slew rate and 200ns (0.2%) settling time of these amplifiers make them ideal components for pulse amplification and data acquisition designs. these devices are valuable components for rf and video circuitry requiring up to 20mhz gain bandwidth and 2mhz power bandwidth. for accurate signal conditioning designs the ha-2520/2522/2525 s superior dynamic specifications are complemented by 10na offset current, 100m ? input impedance and offset trim capability. mil-std-883 product and data sheets are available upon request. features high slew rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120v/ s fast settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200ns full power bandwidth . . . . . . . . . . . . . . . . . . . . . . . . 2mhz gain bandwidth (a v 3) . . . . . . . . . . . . . . . . . . . . 20mhz high input impedance . . . . . . . . . . . . . . . . . . . . . . 100m ? low offset current . . . . . . . . . . . . . . . . . . . . . . . . . . .10na compensation pin for unity gain capability applications data acquisition systems rf ampli?rs video ampli?rs signal generators pinouts ha-2520 (cerdip) ha-2525 (pdip, cerdip, soic) top view ha-2520/22/25 (metal can) top view ordering information part number (brand) temp. range ( o c) package pkg. no. ha2-2520-2 -55 to 125 8 pin metal can t8.c ha2-2522-2 -55 to 125 8 pin metal can t8.c ha2-2525-5 0 to 75 8 pin metal can t8.c HA3-2525-5 0 to 75 8 ld pdip e8.3 ha7-2520-2 -55 to 125 8 ld cerdip f8.3a ha7-2525-5 0 to 75 8 ld cerdip f8.3a ha9p2525-5 (h25255) 0 to 75 8 ld soic m8.15 bal -in +in v- 1 2 3 4 8 7 6 5 comp v+ out bal - + comp out in- v- bal in+ v+ bal 2 4 6 1 3 7 5 8 - + data sheet september 1998 file number 2894.3 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999
2 absolute maximum ratings thermal information supply voltage (between v+ and v- terminals) . . . . . . . . . . . . 40v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15v output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ma operating conditions temperature range ha-2520/2522-2 . . . . . . . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c ha-2525-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 75 o c thermal resistance (typical, note 1) ja ( o c/w) jc ( o c/w) metal can package . . . . . . . . . . . . . . . 165 80 pdip package . . . . . . . . . . . . . . . . . . . 96 n/a cerdip package. . . . . . . . . . . . . . . . . 135 50 soic package . . . . . . . . . . . . . . . . . . . 157 n/a maximum junction temperature (hermetic packages). . . . . . . 175 o c maximum junction temperature (plastic package) . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations v supply = 15v parameter temp ( o c) ha-2520-2 ha-2522-2 ha-2525-5 units min typ max min typ max min typ max input characteristics offset voltage 25 - 4 8 - 5 10 - 5 10 mv full - - 11 - - 14 - - 14 mv offset voltage drift full - 20 - - 25 - - 30 - v/ o c bias current 25 - 100 200 - 125 250 - 125 250 na full - - 400 - - 500 - - 500 na offset current 25 - 10 25 - 20 50 - 20 50 na full - - 50 - - 100 - - 100 na input resistance (note 2) 25 50 100 - 40 100 - 40 100 - m ? common mode range full 10.0 - - 10.0 - - 10.0 - - v transfer characteristics large signal voltage gain (notes 3, 6) 25 10 15 - 7.5 15 - 7.5 15 - kv/v full 7.5 - - 5 - -- 5 - - kv/v common mode rejection ratio (note 4) full 80 90 - 74 90 - 74 90 - db gain bandwidth (notes 2, 5) 25 10 20 - 10 20 - 10 20 - mhz minimum stable gain 25 3 - - 3 - - 3 - - v/v output characteristics output voltage swing (note 3) full 10.0 12.0 - 10.0 12.0 - 10.0 12.0 - v output current (note 6) 25 10 20 - 10 20 - 10 20 - ma full power bandwidth (notes 6, 11) 25 1.5 2.0 - 1.2 2.0 - 1.2 2.0 - mhz transient response (a v = +3) rise time (notes 3, 7, 8, 10) 25 - 25 50 - 25 50 - 25 50 ns overshoot (notes 3, 7, 8, 10) 25 - 25 40 - 25 50 - 25 50 % slew rate (notes 3, 7, 10, 12) 25 100 120 - 80 120 - 80 120 - v/ s settling time (notes 3, 7, 10, 12) 25 - 0.20 - - 0.20 - - 0.20 - s ha-2520, ha-2522, ha-2525
3 power supply characteristics supply current 25 - 4 6 - 4 6 - 4 6 ma power supply rejection ratio (note 9) full 80 90 - 74 90 - 74 90 - db notes: 2. this parameter value is based on design calculations. 3. r l = 2k ? . 4. v cm = 10v. 5. a v > 10. 6. v o = 10.0v. 7. c l = 50pf. 8. v o = 200mv. 9. ? v = 5.0v. 10. see transient response test circuits and waveforms. 11. full power bandwidth guaranteed based on slew rate measurement using: . 12. v out = 5v. electrical speci?ations v supply = 15v (continued) parameter temp ( o c) ha-2520-2 ha-2522-2 ha-2525-5 units min typ max min typ max min typ max fpbw slew rate 2 v peak ---------------------------- - = test circuits and waveforms figure 1. slew rate and settling time note: measured on both positive and negative transitions from 0v to +200mv and 0v to -200mv at the output. figure 2. transient response figure 3. slew rate and transient response notes: 13. a v = -3. 14. feedback and summing resistor ratios should be 0.1% matched. 15. clipping diodes cr 1 and cr 2 are optional. hp5082-2810 recommended. figure 4. settling time test circuit +1.67v input +5v 75% output 25% error band 10mv from final value ? t slew = ? v/ ? t -1.67v settling time ? v -5v rate input 90% output 10% 0v rise time 67mv 0v 200mv overshoot out in + 1333 ? 50pf - 667 ? 5pf output input 667.2 ? 1667 ? 2 3 4 6 7 100pf v+ v- d g s 2n4416 cr 1 cr 2 settling time test point 1 f 0.001 f 1 f 0.001 f 2001 ? 4999.9 ? 2000 ? + - ha-2520, ha-2522, ha-2525
4 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site http://www.intersil.com schematic diagram note: tested offset adjustment range is |v os + 1mv| minimum referred to output. typical ranges are 20mv with r t = 20k ?. figure 5. suggested v os adjustment and compensation hook-up test circuits and waveforms (continued) out in bal. v- v+ 20k ? comp c c q 29 q 30 r 11 r 10 200 r 2bb r 21 200 r 2aa 440 1.8k r 2b q 3b q 3a 1.8k r 2a q 4b q 4a q 18 q 19 q 20 q 21a q 25 q 22 r 6a r 6b q 1b q 1a q 2a q 2b r 1a r 1b q 17 r 16 r 15 r 13 q 28 q 27 q 24 q 31 q 26 q 21b q 5a q 5b r 3a r 3b r 19 q 10 r 10 d 14 q 16 q 8 q 23 v+ r 12 q 15 q 12a r 9 d 138 q 12b q 11b output q 7 q 6 d 13a q 11a q 9 v- +input bal 1 bal 2 offset - offset+ -input pin 1 440 c 1 1pf comp r 18 30 r 17 50 ha-2520, ha-2522, ha-2525
5 typical application inverting unity gain circuit figure 6 shows a compensation circuit for an inverting unity gain amplifier. the circuit was tested for functionality with supply voltages from 4v to 15v, and the performance as tested was: slew rate 120v/ s; bandwidth 10mhz; and settling time (0.1%) 500ns. figure 7 illustrates the amplifier s frequency response, and it is important to note that capacitance at pin 8 must be minimized for maximum bandwidth. 10k out ha-2520 5k 500pf 2k 10k in + - figure 6. inverting unity gain circuit gain (db) gain phase phase shift (degrees) 15 10 5 0 -5 -10 -15 10k 100k 1m 10m 0 -45 -90 -135 -180 figure 7. frequency response for inverting unity gain circuit typical performance curves v s = 15v, t a = 25 o c, unless otherwise speci?d figure 8. offset voltage vs temperature (6 typical units from 3 lots) figure 9. bias current vs temperature (6 typical units from 3 lots) figure 10. offset current vs temperature (5 typical units from 3 lots) figure 11. open loop gain vs temperature (6 typical units from 3 lots) temperature ( o c) 0 20 40 60 80 100 120 -20 -40 offset voltage (mv) 0 1 2 3 4 5 6 -3 -2 -1 -60 temperature ( o c) 0 20 40 60 80 100 120 -20 -40 -60 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 bias current (na) temperature ( o c) 0 20 40 60 80 100 120 -20 -40 -60 40 30 20 10 0 -30 -20 -10 offset bias current (na) temperature ( o c) 0 20 40 60 80 100 120 -20 -40 -60 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 6 7 a vol (kv/ v) ha-2520, ha-2522, ha-2525
6 figure 12. output current vs supply voltage figure 13. output voltage swing vs supply voltage figure 14. supply current vs supply voltage figure 15. frequency response figure 16. open loop frequency response for various values of capacitors from comp pin to ground figure 17. input noise characteristics typical performance curves v s = 15v, t a = 25 o c, unless otherwise speci?d (continued) 468101214 supply voltage ( v) 50 40 30 20 10 0 -40 -30 -20 -10 output current ( ma) 468101214 supply voltage ( v) output voltage swing ( v) 12 10 8 6 4 0 -8 -6 -4 -2 2 14 -12 -10 r l = 2k ? 46 8101214 supply voltage ( v) 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 supply current (ma) 25 o c -55 o c 125 o c frequency (hz) 80 60 40 20 0 100 gain (db) 0 -45 -90 -135 -180 phase angle (degrees) 10k 100k 1m 10m 100m 1k 100 open loop gain open loop phase phase at a v = 100 gain at a v = 100 frequency (hz) 80 60 40 20 0 100 10k 100k 1m 10m 100m 1k 100 -20 0pf 10pf 30pf 50pf 100pf 300pf 1 10 100 1k 10k 100k frequency (hz) input noise current (pa/ hz) input noise voltage (nv/ ha-2520, ha-2522, ha-2525
7 die characteristics die dimensions: 67 mils x 57 mils x 19 mils (1700 m x 1440 m x 483 m) metallization: type: al, 1% cu thickness: 16k ? 2k ? substrate potential: unbiased passivation: type: nitride (si 3 n 4 ) over silox (sio 2 , 5% phos.) silox thickness: 12k ? 2k ? nitride thickness: 3.5k ? 1.5k ? transistor count: 40 process: bipolar dielectric isolation metallization mask layout ha-2520, ha-2522, ha-2525 figure 18. output voltage swing vs frequency figure 19. normalized ac parameters vs supply voltage typical performance curves v s = 15v, t a = 25 o c, unless otherwise speci?d (continued) 10k 100k 1m 10m frequency (hz) 35 30 25 20 15 10 5 0 output voltage swing (v p-p ) v supply = 20v v supply = 10v v supply = 15v 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 r l = 2k ? c l = 50pf bandwidth positive slew rate negative slew rate normalized to 15v data supply voltage ( v) 20 5791113151719 comp v+ out bal bal -in +in v- ha-2520, ha-2522, ha-2525
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